This invention relates to a semiconductor device and, particularly, to a semiconductor device of the insulated gate field effect transistor (hereinafter abbreviated to MOS transistor) type which permits a high degree of circuit integration and designing of a simplified circuit system by letting it operate at low temperatures.
Conventional dynamic type integrated circuits suffer from the drawback that it does not operate stably due to a variation of potential at a circuit node caused by a junction leak current. Therefore, the dynamic circuit needed a number of internal/external timing clocks for supplying the electric charge cyclically. On the other hand, static circuits not having the foregoing drawback of the dynamic circuit have another drawback that the degree of integration can not be made high because it requires elements for always supplying the charge to the circuit node.
For reference, FIG. 1 illustrates three-input NOR circuits formed, respectively, by a dynamic circuit (see FIG. 1(a)) using N-channel insulated gate type field effect transistors and by a static circuit (see FIG. 1(b)) using complementary type MOS transistors (hereinafter abbreviated to CMOS), and their exemplary operation waveforms. In this drawing, X.sub.1, X.sub.2, X.sub.3 is an input signal, Y.sub.1 is an output signal, V.sub.cc is a supplied voltage, V.sub.ss is a ground level, and .phi. is a timing clock. In the case of the dynamic circuit, the potential of the output node Y.sub.1 becomes V.sub.ss owing to the driving MOS or junction leakage when the circuit is in the operating state represented by the exemplary waveform or if a waiting time t is long. Thus, the cyclic external timing clock .phi. is needed. Or, in the case of the static circuit, three MOS transistors are needed to supply the charge to the output node Y.sub.1 only when all of the input signals have the potential V.sub.ss. Thus, the degree of integration of the static circuit is low in comparison with the dynamic circuit.
The following articles describe the operation in the low-temperature range of MOS type semiconductor elements: (1) F. H. Gaensslen et al., "Very Small MOS FET's for Low-Temperature Operation" in IEEE Trans. Electron Devices, ED-24, 218-229, 1977; (2) W. Link et al., "Eigenschaften Von Mos-Ein-Transistor speicherzellen bei tiefen Temperaturen" in Band 33, 229-235, 1979; and (3) T. Moro-oka et al., "Operation Analysis of Dynamic RAM in Low-Temperature" in Japan Electronic and Communication Society, Preliminary Report for National Convention, 2-283, 1984.
Literature (1) analyzes how the characteristics of the device behave in the low-temperature range and reports, for example, how the relation between electron's speed and electric field changes in response to temperature variation, how the threshold voltage changes in response to temperature variation (the threshold voltage V.sub.T rises if the device is subjected to low temperatures), and at which temperature the electric charge accumulated in the junction point shows a smaller leakage, at 296K or 77K (of the low-temperature range); (the leak of electric charge is less in the low-temperature range). Literature (2) discloses the temperature characteristic of the dynamic type RAM and reports, for example, the relation between refresh time and temperature (the interval of refresh time is permitted to be long as it comes to the low-temperature range). However, neither Literature (1) nor Literature (2) recognized problems arising if the MOS element operable in the low-temperature range were applied to particular circuitryl
Literature (3) is disclosing the operation characteristic of the dynamic type RAM at low temperatures and reports, for example, that the refresh time becomes long proportionally as it becomes a low temperature in the case of a paused refresh mode (where no other circuits are operating), whereas in a disturbed refresh mode (where other circuits are operating) the refresh time does not change if it is below a certain temperature within the low-temperature range. However, this literature does not comment on the most suitable circuit system for the MOS element operable in the low-temperature range.